8-bit shift register, serial-parallel

With the shift register, a stream of serial bits can be loaded in the registers R1 to R8, which are output in parallel via the inputs Q1 to Q8.

The contents of each register are then shifted to the subsequent register with each rising edge from 0 to 1 at input C. The contents of register R1 are set to the value of input I.

The shift register also has an inverted input R for reset, i.e. R=0 sets all registers to 0.

The IC 74HC164 is used as a component in the training package TP 1012 from Festo Didactic.