D flip-flop with SET and CLR inputs
This D flip-flop is an edge-triggered D flip-flop with two additional inputs CLR (clear) and SET (set). With the input CLR, the internal state can be set directly to 0. The input CLR is inverted, i.e. CLR=0 sets the internal state directly to 0. With the input SET, the internal state can be set directly to 1.
Truth table
CLR | SET | C | D | Q1 | Q2 |
---|---|---|---|---|---|
1 | 1 | x | x | 1 | 0 |
0 | 0 | x | x | 0 | 1 |
0 | 1 | x | x | 1 | 1 |
1 | 0 | ↑ | 0 | 0 | 1 |
1 | 0 | ↑ | 1 | 1 | 0 |
1 | 0 | x | x | q1 | q2 |
Comments:
x = any (0 or 1) ↑ = positive edge from 0 to 1 q = state of output Q remains unchanged
Adjustable parameters
Designation | Range | Default value |
---|---|---|
Voltage level (lo) | 0.1 ... 24 V | 0.8 |
Voltage level (hi) | 0.1 ... 24 V | 2 |
Designation | Range | Default value |
---|---|---|
Voltage level (lo) | 0 ... 24 V | 0 |
Voltage level (hi) | 0.1 ... 24 V | 5 |
Resistance | 0.1 ... 1000 Ohm | 50 |